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IET Computers & Digital Techniques

Impact Factor News

IET Computers and Digital Techniques' Impact Factor increased by 99% to 0.629 in 2010.

Scope

IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test. The key subject areas of interest are:

Design: hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, system-on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.

Verification: electrical and timing simulation, hardware/software co-simulation, mixed-domain technology modelling and simulation, power analysis and estimation, interconnect modelling and signal integrity analysis.

Test: design-for-testability, embedded core testing, system-on-chip testing, on-line testing, test quality and reliability, microprocessor testing, low-power testing, fault modelling and fault tolerance, automatic test generation and delay testing.

Processor and System Architectures: general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.

Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and reconfigurable hardware.

Case Studies: state-of-the-art CAD/EDA tools, applications in industrial designs, and design frameworks.

Forthcoming Special Issues

  • Three-dimensional Integrated Circuits Design
  • Asynchronous Circuits and Systems - Call for Papers

Published Special Issues

Featured Paper

Test pattern generation for droop faults, Vol.4, No.4, p.274–284

Author and Reader Benefits

  • Worldwide readership and database coverage (including ISI and Inspec)
  • Rapid times to decision (typically less than 16 weeks)
  • No page charges to authors
  • Review/survey papers now freely available on the IET Digital Library for 2 years from publication
  • All content also available via the IEEE Xplore digital library

IET Research Journals are available online (in advance of printed publication) via the IET Digital Library. To access the full-text of articles for this journal, you will need a valid subscription, or you can purchase individual articles by clicking the 'Buy This PDF' link on the article abstract page.

Citing this Journal

IET Computers & Digital Techniques is usually cited by the abbreviated title 'IET Comput. Digit. Tech.' Every article in this journal is assigned a Crossref DOI, which is displayed on the article abstract page.

Previous Title

Online subscribers to IET Computers & Digital Techniques can access all backfile issues from 2007 onwards as well as all issues of IEE Proceedings Computers and Digital Techniques from 1994-2006 as part of their current online subscription.